The present invention relates to a method for manufacturing a semiconductor integrated circuit device. The present invention, more particularly, relates to a manufacturing method in which a fine contact aperture is formed on the semiconductor device.
FIGS. 1A and 1B are sectional view showing various manufacturing steps in the conventional method used for forming contact recesses in a semiconductor device, for example, a "MOS" type semiconductor device. In FIGS. 1A and 1B, reference numeral 1 indicates a substrate made of silicon, 2 a source-drain diffusion layer, 3 a separating silicon dioxide layer, 4 a silicon gate electrode, and 5 an insulating silicon dioxide layer. In the case that a conductive electrode is to be formed connecting with the source-drain diffusion layer or the gate electrode formed on the substrate, the following difficult manufacturing processes must be performed.
First a resist layer is formed as a mask, using wellknown photolithographic techniques, on the substrate in areas other than those where the conductive electrode is to be deposited. Successively, the insulating silicon dioxide layer 5 is partly etched away after which the electrode metal is deposited through the etched recess. The resist layer 6 is then removed after which the device has the final construction as shown in FIG. 1B.
In the case of above-described method, it is very difficult to accurately form apertures with a width of 1 .mu.m or less. Although it is possible to form the resist pattern with aperture widths of 1 .mu.m or less using electron beam exposure techniques, in the following etching process it is very difficult to form an aperture which an accuracy of 1 .mu.m on the desired layer with the conventional etching technique. The method of etching used in this process may be an ion etching method or the like or micro-machining may be used. However, these conventional etching techniques are difficult to put to practical use because of the difficulty in etching selectively the resist layer 6 and the substrate 1.